FreeNOS
ARMSecondTable.cpp
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1 /*
2  * Copyright (C) 2015 Niek Linnenbank
3  *
4  * This program is free software: you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation, either version 3 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program. If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #include <FreeNOS/System.h>
19 #include "ARMCore.h"
20 #include "ARMConstant.h"
21 #include "ARMSecondTable.h"
22 
23 /*
24  * nG: bits 11
25  * S: bits 10
26  * APX: bits 9
27  * TEX: bits 6, 7, 8
28  * AP: bits 4, 5
29  * C: bits 3
30  * B: bits 2
31  * XN: bits 0
32  *
33  * @see ARM Architecture Reference Manual, page 709.
34  */
35 #define PAGE2_NONE (0)
36 #define PAGE2_PRESENT (1 << 1)
37 
53 #define PAGE2_UNCACHED (PAGE2_TEX)
54 
56 #define PAGE2_CACHE_WRITEBACK (PAGE2_TEX | PAGE2_CACHE | PAGE2_BUFFER)
57 
59 #define PAGE2_CACHE_WRITETHROUGH (PAGE2_CACHE)
60 
62 #define PAGE2_DEVICE_PRIV ((1 << 7))
63 
65 #define PAGE2_DEVICE_SHARED (PAGE2_BUFFER)
66 
67 #define PAGE2_TEX (1 << 6)
68 #define PAGE2_CACHE (1 << 3)
69 #define PAGE2_BUFFER (1 << 2)
70 #define PAGE2_SHARED (1 << 10)
71 
82 #define PAGE2_NOEXEC (1 << 0)
83 
84 /* Read-only flag */
85 #define PAGE2_APX (1 << 9)
86 
87 /* User access permissions flag */
88 #define PAGE2_AP_USER (1 << 5)
89 
90 /* System access permissions flag */
91 #define PAGE2_AP_SYS (1 << 4)
92 
104 #define TABENTRY(vaddr) \
105  (((vaddr) >> PAGESHIFT) & 0xff)
106 
108  Address phys,
109  Memory::Access access)
110 {
111  Arch::Cache cache;
112 
113  // Check if the address is already mapped
114  if (m_pages[ TABENTRY(virt) ] & PAGE2_PRESENT)
116 
117  // Insert mapping
118  m_pages[ TABENTRY(virt) ] = (phys & PAGEMASK) | PAGE2_PRESENT | flags(access);
119  cache.cleanData(&m_pages[TABENTRY(virt)]);
120  return MemoryContext::Success;
121 }
122 
124 {
125  Arch::Cache cache;
126 
127  m_pages[ TABENTRY(virt) ] = PAGE2_NONE;
128  cache.cleanData(&m_pages[TABENTRY(virt)]);
129  return MemoryContext::Success;
130 }
131 
133 {
134  if (!(m_pages[ TABENTRY(virt) ] & PAGE2_PRESENT))
136 
137  *phys = (m_pages[ TABENTRY(virt) ] & PAGEMASK);
138  return MemoryContext::Success;
139 }
140 
142 {
143  u32 entry = m_pages[ TABENTRY(virt) ];
144 
145  if (!(entry & PAGE2_PRESENT))
147 
148  // Permissions
150 
151  if (entry & PAGE2_AP_USER)
152  *access |= Memory::User;
153 
154  if (!(entry & PAGE2_APX))
156 
157  // Caching
160  else if (entry & PAGE2_UNCACHED)
162  else
164 
165  return MemoryContext::Success;
166 }
167 
169 {
170  u32 f = PAGE2_AP_SYS;
171 
172  // Permissions
173  if (!(access & Memory::Executable)) f |= PAGE2_NOEXEC;
174  if ((access & Memory::User)) f |= PAGE2_AP_USER;
175  if (!(access & Memory::Writable)) f |= PAGE2_APX;
176 
177  // Caching
179  else if (access & Memory::Uncached) f |= PAGE2_UNCACHED;
180  else f |= PAGE2_CACHE_WRITEBACK;
181 
182  return f;
183 }
Memory::InnerCached
@ InnerCached
Definition: Memory.h:46
Memory::Executable
@ Executable
Definition: Memory.h:43
ARMConstant.h
PAGE2_DEVICE_SHARED
#define PAGE2_DEVICE_SHARED
Memory Mapped Device (Shared)
Definition: ARMSecondTable.cpp:65
Memory::Writable
@ Writable
Definition: Memory.h:42
PAGEMASK
#define PAGEMASK
Mask to find the page.
Definition: ARMConstant.h:121
Memory::User
@ User
Definition: Memory.h:44
ARMSecondTable::access
MemoryContext::Result access(Address virt, Memory::Access *access) const
Get Access flags for a virtual address.
Definition: ARMSecondTable.cpp:141
MemoryContext::AlreadyExists
@ AlreadyExists
Definition: MemoryContext.h:54
ARMCore.h
Memory::OuterCached
@ OuterCached
Definition: Memory.h:47
Memory::Device
@ Device
Definition: Memory.h:48
Address
unsigned long Address
A memory address.
Definition: Types.h:131
MemoryContext::InvalidAddress
@ InvalidAddress
Definition: MemoryContext.h:52
Memory::Readable
@ Readable
Definition: Memory.h:41
PAGE2_AP_SYS
#define PAGE2_AP_SYS
Definition: ARMSecondTable.cpp:91
PAGE2_APX
#define PAGE2_APX
Definition: ARMSecondTable.cpp:85
ARMSecondTable::unmap
MemoryContext::Result unmap(Address virt)
Remove virtual address mapping.
Definition: ARMSecondTable.cpp:123
Memory::Uncached
@ Uncached
Definition: Memory.h:45
MemoryContext::Result
Result
Result codes.
Definition: MemoryContext.h:49
ARMCacheV6
ARMv6 cache management implementation.
Definition: ARMCacheV6.h:42
u32
unsigned int u32
Unsigned 32-bit number.
Definition: Types.h:53
MemoryContext::Success
@ Success
Definition: MemoryContext.h:51
Cache::cleanData
virtual Result cleanData(Address addr)
Clean one data page.
Definition: Cache.cpp:20
PAGE2_UNCACHED
#define PAGE2_UNCACHED
Disable all caching.
Definition: ARMSecondTable.cpp:53
PAGE2_NONE
#define PAGE2_NONE
Definition: ARMSecondTable.cpp:35
Memory::Access
Access
Memory access flags.
Definition: Memory.h:38
ARMSecondTable::m_pages
u32 m_pages[256]
Array of second level page table entries.
Definition: ARMSecondTable.h:99
PAGE2_PRESENT
#define PAGE2_PRESENT
Definition: ARMSecondTable.cpp:36
ARMSecondTable::translate
MemoryContext::Result translate(Address virt, Address *phys) const
Translate virtual address to physical address.
Definition: ARMSecondTable.cpp:132
PAGE2_NOEXEC
#define PAGE2_NOEXEC
No-execute bit flag.
Definition: ARMSecondTable.cpp:82
entry
u32 entry[]
Definition: IntelACPI.h:64
ARMSecondTable.h
TABENTRY
#define TABENTRY(vaddr)
Entry inside the page table of a given virtual address.
Definition: ARMSecondTable.cpp:104
ARMSecondTable::flags
u32 flags(Memory::Access access) const
Convert MemoryAccess to page table flags.
Definition: ARMSecondTable.cpp:168
ARMSecondTable::map
MemoryContext::Result map(Address virt, Address phys, Memory::Access)
Map a virtual address to a physical address.
Definition: ARMSecondTable.cpp:107
PAGE2_CACHE_WRITEBACK
#define PAGE2_CACHE_WRITEBACK
Outer and Inner Write-Back.
Definition: ARMSecondTable.cpp:56
PAGE2_AP_USER
#define PAGE2_AP_USER
Definition: ARMSecondTable.cpp:88