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ARMGenericInterrupt.h
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1 /*
2  * Copyright (C) 2019 Niek Linnenbank
3  *
4  * This program is free software: you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation, either version 3 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program. If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef __LIBARCH_ARM_ARMGENERICINTERRUPT_H
19 #define __LIBARCH_ARM_ARMGENERICINTERRUPT_H
20 
21 #include <IntController.h>
22 #include "ARMIO.h"
23 
39 {
40  private:
41 
43  static const Size NumberOfSoftwareInterrupts = 16;
44 
49  {
50  GICD_CTRL = 0x0000,
51  GICD_TYPER = 0x0004,
52  GICD_GROUPR = 0x0080,
53  GICD_ISENABLER = 0x0100,
54  GICD_ICENABLER = 0x0180,
55  GICD_ICPENDR = 0x0280,
56  GICD_ISACTIVER = 0x0300,
57  GICD_ICACTIVER = 0x0380,
58  GICD_IPRIORITYR = 0x0400,
59  GICD_ITARGETSR = 0x0800,
60  GICD_ICFGR = 0x0C00,
61  GICD_SGIR = 0x0F00,
62  GICD_CPENDSGIR = 0x0F10,
63  GICD_ID2 = 0x0FE8
64  };
65 
67  {
68  DistCtrlGroup0 = (1 << 0),
69  DistCtrlGroup1 = (1 << 1)
70  };
71 
73  {
75  };
76 
81  {
82  GICC_CTRL = 0x0000,
83  GICC_PMR = 0x0004,
84  GICC_IAR = 0x000C,
85  GICC_EOIR = 0x0010,
86  GICC_IDR = 0x00FC,
87  GICC_DIR = 0x1000
88  };
89 
91  {
92  CpuCtrlGroup0 = (1 << 0),
93  CpuCtrlGroup1 = (1 << 1)
94  };
95 
97  {
98  CpuIrqAckMask = (0x3ff),
99  };
100 
101  public:
102 
109  ARMGenericInterrupt(Address distRegisterBase,
110  Address cpuRegisterBase);
111 
119  Result initialize(bool performReset = true);
120 
129  virtual Result send(const uint targetCoreId, const uint irq);
130 
138  virtual Result enable(uint irq);
139 
147  virtual Result disable(uint irq);
148 
160  virtual Result clear(uint irq);
161 
169  virtual Result nextPending(uint & irq);
170 
178  virtual bool isTriggered(uint irq);
179 
180  private:
181 
189  Size numRegisters(Size bits) const;
190 
196  bool isSoftwareInterrupt(const uint irq) const;
197 
198  private:
199 
202 
205 
208 
211 };
212 
219 #endif /* __LIBARCH_ARM_ARMGENERICINTERRUPT_H */
ARMGenericInterrupt::GICD_ICENABLER
@ GICD_ICENABLER
Definition: ARMGenericInterrupt.h:54
ARMGenericInterrupt::DistCtrlFlags
DistCtrlFlags
Definition: ARMGenericInterrupt.h:66
ARMGenericInterrupt::CpuIrqAckMask
@ CpuIrqAckMask
Definition: ARMGenericInterrupt.h:98
ARMGenericInterrupt::GICD_SGIR
@ GICD_SGIR
Definition: ARMGenericInterrupt.h:61
ARMGenericInterrupt::GICC_IDR
@ GICC_IDR
Definition: ARMGenericInterrupt.h:86
IntController
Interrupt controller interface.
Definition: IntController.h:35
ARMGenericInterrupt::GICC_IAR
@ GICC_IAR
Definition: ARMGenericInterrupt.h:84
ARMGenericInterrupt::isSoftwareInterrupt
bool isSoftwareInterrupt(const uint irq) const
Check if the given IRQ is an SGI.
Definition: ARMGenericInterrupt.cpp:145
ARMGenericInterrupt::CpuCtrlFlags
CpuCtrlFlags
Definition: ARMGenericInterrupt.h:90
ARMGenericInterrupt::initialize
Result initialize(bool performReset=true)
Initialize the controller.
Definition: ARMGenericInterrupt.cpp:35
ARMGenericInterrupt::DistTypeFlags
DistTypeFlags
Definition: ARMGenericInterrupt.h:72
ARMGenericInterrupt::send
virtual Result send(const uint targetCoreId, const uint irq)
Raise a software generated interrupt (SGI).
Definition: ARMGenericInterrupt.cpp:77
ARMIO
Input/Output operations specific to the ARM architecture.
Definition: ARMIO.h:39
ARMGenericInterrupt::GICD_ID2
@ GICD_ID2
Definition: ARMGenericInterrupt.h:63
ARMGenericInterrupt::isTriggered
virtual bool isTriggered(uint irq)
Check if an IRQ vector is set.
Definition: ARMGenericInterrupt.cpp:131
ARMGenericInterrupt::CpuIrqAckFlags
CpuIrqAckFlags
Definition: ARMGenericInterrupt.h:96
ARMGenericInterrupt::GICD_GROUPR
@ GICD_GROUPR
Definition: ARMGenericInterrupt.h:52
ARMGenericInterrupt::DistRegisters
DistRegisters
Distributor register interface.
Definition: ARMGenericInterrupt.h:48
ARMGenericInterrupt::CpuRegisters
CpuRegisters
CPU register interface.
Definition: ARMGenericInterrupt.h:80
Address
unsigned long Address
A memory address.
Definition: Types.h:131
ARMGenericInterrupt::GICD_ICACTIVER
@ GICD_ICACTIVER
Definition: ARMGenericInterrupt.h:57
ARMGenericInterrupt
ARM Generic Interrupt Controller (GIC) version 2.
Definition: ARMGenericInterrupt.h:38
ARMGenericInterrupt::m_numIrqs
Size m_numIrqs
Number of interrupts supported.
Definition: ARMGenericInterrupt.h:207
uint
unsigned int uint
Unsigned integer number.
Definition: Types.h:44
ARMGenericInterrupt::GICD_CPENDSGIR
@ GICD_CPENDSGIR
Definition: ARMGenericInterrupt.h:62
ARMGenericInterrupt::NumberOfSoftwareInterrupts
static const Size NumberOfSoftwareInterrupts
Total number of software generated interrupts (SGI)
Definition: ARMGenericInterrupt.h:43
ARMGenericInterrupt::GICC_EOIR
@ GICC_EOIR
Definition: ARMGenericInterrupt.h:85
ARMGenericInterrupt::GICC_CTRL
@ GICC_CTRL
Definition: ARMGenericInterrupt.h:82
ARMGenericInterrupt::enable
virtual Result enable(uint irq)
Enable hardware interrupt (IRQ).
Definition: ARMGenericInterrupt.cpp:84
ARMGenericInterrupt::GICC_PMR
@ GICC_PMR
Definition: ARMGenericInterrupt.h:83
ARMGenericInterrupt::clear
virtual Result clear(uint irq)
Clear hardware interrupt (IRQ).
Definition: ARMGenericInterrupt.cpp:102
ARMGenericInterrupt::m_savedIrqAck
u32 m_savedIrqAck
Saved value of the Interrupt-Acknowledge register.
Definition: ARMGenericInterrupt.h:210
ARMGenericInterrupt::disable
virtual Result disable(uint irq)
Disable hardware interrupt (IRQ).
Definition: ARMGenericInterrupt.cpp:93
ARMGenericInterrupt::GICD_CTRL
@ GICD_CTRL
Definition: ARMGenericInterrupt.h:50
u32
unsigned int u32
Unsigned 32-bit number.
Definition: Types.h:53
Size
unsigned int Size
Any sane size indicator cannot go negative.
Definition: Types.h:128
ARMGenericInterrupt::GICD_ICPENDR
@ GICD_ICPENDR
Definition: ARMGenericInterrupt.h:55
ARMGenericInterrupt::GICD_TYPER
@ GICD_TYPER
Definition: ARMGenericInterrupt.h:51
ARMGenericInterrupt::numRegisters
Size numRegisters(Size bits) const
Calculate the number of 32-bit registers needed to represent given number of bits per IRQ.
Definition: ARMGenericInterrupt.cpp:137
ARMGenericInterrupt::GICD_IPRIORITYR
@ GICD_IPRIORITYR
Definition: ARMGenericInterrupt.h:58
ARMGenericInterrupt::GICD_ITARGETSR
@ GICD_ITARGETSR
Definition: ARMGenericInterrupt.h:59
ARMGenericInterrupt::GICD_ISACTIVER
@ GICD_ISACTIVER
Definition: ARMGenericInterrupt.h:56
ARMGenericInterrupt::ARMGenericInterrupt
ARMGenericInterrupt(Address distRegisterBase, Address cpuRegisterBase)
Constructor.
Definition: ARMGenericInterrupt.cpp:21
ARMGenericInterrupt::CpuCtrlGroup1
@ CpuCtrlGroup1
Definition: ARMGenericInterrupt.h:93
ARMGenericInterrupt::GICD_ISENABLER
@ GICD_ISENABLER
Definition: ARMGenericInterrupt.h:53
ARMGenericInterrupt::CpuCtrlGroup0
@ CpuCtrlGroup0
Definition: ARMGenericInterrupt.h:92
IntController.h
ARMGenericInterrupt::m_dist
ARMIO m_dist
ARM Generic Interrupt Controller Distributor Interface.
Definition: ARMGenericInterrupt.h:201
ARMGenericInterrupt::m_cpu
ARMIO m_cpu
ARM Generic Interrupt Controller CPU Interface.
Definition: ARMGenericInterrupt.h:204
ARMGenericInterrupt::DistCtrlGroup0
@ DistCtrlGroup0
Definition: ARMGenericInterrupt.h:68
ARMIO.h
ARMGenericInterrupt::GICC_DIR
@ GICC_DIR
Definition: ARMGenericInterrupt.h:87
IntController::Result
Result
Result codes.
Definition: IntController.h:42
ARMGenericInterrupt::DistCtrlGroup1
@ DistCtrlGroup1
Definition: ARMGenericInterrupt.h:69
ARMGenericInterrupt::DistTypeIrqsMask
@ DistTypeIrqsMask
Definition: ARMGenericInterrupt.h:74
ARMGenericInterrupt::GICD_ICFGR
@ GICD_ICFGR
Definition: ARMGenericInterrupt.h:60
ARMGenericInterrupt::nextPending
virtual Result nextPending(uint &irq)
Retrieve the next pending interrupt (IRQ).
Definition: ARMGenericInterrupt.cpp:116